As integrated circuits become more complex and are pushed to their highest operating speeds there is a growing concern for power dissipation. The resultant design is usually based on a trade off in the speed-power product characteristic of a given technology. Two major factors limit the speed product of present ECL circuits, isolation capacitance and high frequency performance at low collector current. Isolation capacitance has recently been minimized with the introduction of various sidewall isolation schemes by others. This invention produces excellent high frequency performance at low collector currents.
Magdo and Magdo, International Electric Devices Meeting, Dec. 9-11, 1974, Technical Digest, pp. 276-278, have obtained a full size 0.1 .times. 0.1 mil emitter using an overlap technique within a conventional base structure. Because there is outward diffusion rather than reduction of area in the processing, the finished devise has an emitter area approximately three times larger than the micro-emitter of this invention.
H. Kamioka et al, op. cit., pp. 279-282, have obtained very small emitter area by minimizing stripe width on a conventional base structure. For low current operation the conventional base has the disadvantage of a large parasitic collectorbase capacitance which reduces the low current f.sub.T.